The present invention relates to a semiconductor device, particularly, a technology effective when applied to a semiconductor device equipped with a nonvolatile memory having an ONO (Oxide Nitride Oxide) film.
There is a semiconductor device having, over one semiconductor chip (semiconductor substrate), a memory, a peripheral circuit for driving the memory, and a logic circuit. Examples of the memory formed in this semiconductor device include a volatile memory that retains data only when power is turned ON and a nonvolatile memory that retains data even when power is turned OFF. The nonvolatile memory is, for example, EEPRPM (Electrically Erasable Programmable Read Only Memory) which can electrically write and erase data.
In Japanese Unexamined Patent Publication No. 2002-231829, a nonvolatile memory (memory cell) having a first gate electrode formed on the surface of a channel region via a first insulating film and a second gate electrode formed over both the side walls of the first gate electrode via a second insulating film is disclosed. In this nonvolatile memory, when a predetermined potential is supplied to the first gate electrode and a certain memory cell is selected, by the control of a potential to be supplied to an impurity region (semiconductor region) and a second gate electrode, charges are accumulated independently in an insulating film below the second gate electrode and are read out.
In Japanese Unexamined Patent Publication No. 2005-64178, a nonvolatile memory cell having an MONOS transistor for memory and an MIS transistor for cell selection is disclosed. In this nonvolatile memory cell, when the MIS transistor for cell selection is turned ON and a certain memory cell is selected, programming is carried out by applying a predetermined voltage to an impurity region and a gate electrode of the MONOS transistor.